Aleksandra Josipović Janković

Aleksandra Josipović Janković has extensive work experience as a Verification Engineer in the field of ASIC verification. Aleksandra started their career at Veriest in 2015, where they worked until 2020. At Veriest, they primarily focused on verification engineering tasks. In 2020, they joined ELSYS Eastern Europe as an ASIC Verification Engineer, where they continued to enhance their skills in this area until 2021. Following this, they joined HDL Design House as an ASIC Verification Engineer. Aleksandra's tenure at HDL Design House lasted until 2022, when they joined Veriest once again as a Verification Engineer. Their most recent role is at Veriest, where they are currently employed.

Aleksandra Josipović Janković has a Bachelor's degree in Electrical and Electronics Engineering from the University of Belgrade, which they obtained between 2011 and 2015. Following that, they pursued a Master's degree in the same field at the University of Belgrade between 2015 and 2016.