Yehuda Bejar

Yehuda Bejar started their work experience in 1992 as a Communications Engineer in the Israel Defense Forces, where they worked until 1998. Yehuda then joined Freescale Semiconductor in 1998 as a VLSI Engineer, specializing in validation tools. In this role, they developed a tool and test-bench for running emulation and validation tests for large System-on-Chip (SoC) products. Yehuda worked at Freescale Semiconductor until 2013.

In 2013, Yehuda Bejar joined Intel Corporation as a VLSI Engineer. Yehuda worked as a VLSI Logic Designer and was responsible for designing the 200G Ethernet PHY PCS layer RX and a management module for the Ethernet PHY. Yehuda'srole involved designing clock, reset, initialization, and the host interface with DMA, AMBA AHB-Lite interconnect matrix. Yehuda worked at Intel Corporation until 2017.

Since 2017, Yehuda Bejar has been working at Veriest as a Design Verification Engineer. Further details about their role at Veriest are not provided.

Yehuda Bejar attended Tel Aviv University from 1988 to 1992 and graduated with a Bachelor of Science degree, cum laude, in Electrical and Electronic Engineering. Yehuda then pursued further studies at the same university from 1996 to 2000, earning a Master of Science degree in Electrical and Electronic Engineering (Systems), with a focus on Management studies for Engineering.