Mark (Ming-Lu) Wu is a seasoned professional in ASIC and FPGA design with extensive experience across multiple roles. Currently serving as Senior ASIC/FPGA Design Manager at Alphawave IP Group since January 2022, Mark oversees the development of products such as Epak400G-ZX and 400ZR+ Integrated Client Framer SoC IP Core. Prior experience includes a decade as an ASIC/FPGA Consultant at Precise-ITC, Inc., focusing on 400G and 800G PCS, and a Principal Member of Technical Staff at Cortina Systems, where contributions included energy-efficient Ethernet designs and digital ASIC development. Mark began as an R&D Engineer at IC Plus, notably collaborating with NEC to achieve recognition at Interop 2007 Tokyo. Mark holds a PhD and a Master's degree in Electronic Engineering from National Taiwan University of Science and Technology.
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