Ritesh Joshi

Ritesh Joshi is a seasoned Senior Verification Engineer at Incise Infotech Private Limited, with over a decade of experience in VLSI design and verification since joining in July 2010. Ritesh has developed expertise in RTL design and verification, with a strong focus on OVM/UVM based test bench development and proficiency in Verilog, System Verilog, and VHDL. Previous roles include contractor positions at SanDisk, where Ritesh created test cases for ASIC specifications, and Open-Silicon, Inc., where Ritesh migrated a comprehensive verification database across different simulation tools. Ritesh holds a B.Tech in Electronics and Communication Engineering from TULA'S Institute and completed high school at St. Joseph's University New York.