Suryanarayana Ch

Suryanarayana Ch has extensive experience in the semiconductor industry, with a focus on post-silicon testing and verification. Suryanarayana has worked at multiple companies, starting with a role as a SOC Verification Intern at SION Semiconductors Private Limited in 2018.

Following this, Suryanarayana joined Tessolve in the same year as a Post Silicon (V93K ATE) Engineer. In this role, they were responsible for test method development using Smart RDI for various components such as SMPS, ADC, DAC, ADC Calibration, and LDO Trim. Their tenure at Tessolve lasted until 2022.

Then, Suryanarayana moved on to Anora as a Sr. Post Silicon (V93K ATE) Engineer. Here, they were involved in load board bring-up for mixed signal devices and test method development in 93K using Smart RDI for LDO, TX, and RX amplifier gain measurements.

Currently, Suryanarayana is working at INVECAS as a Sr Engineer (V93K/UFLEX ATE), a role they began in 2022. Their responsibilities include load board bring-up for high-speed IO.

Overall, Suryanarayana Ch has a strong background in post-silicon testing and verification, with experience in test method development and load board bring-up across multiple companies.

Suryanarayana Ch pursued their Bachelor of Technology degree in Electrical and Electronics Engineering from Anucet, a school they attended from 2013 to 2017. Prior to that, they completed their Intermediate studies in M.P.C from Pragati junior college-Tanuku, attending from 2011 to 2013.