Núria Egidos Plaja

Núria Egidos Plaja is a Design Verification Engineer at Monolithic Power Systems, Inc. since January 2021, specializing in the design verification of mixed-signal ICs for power management applications using DFT techniques within a UVM framework. Prior experience includes serving as a Doctoral Student at CERN from August 2016 to January 2021, where Núria worked on the FastICpix ATTRACT European project, focusing on the design and implementation of a high-resolution scalable Clock Distribution Network, along with tasks related to the verification of depleted radiation hard monolithic active pixel CMOS sensors. Additional roles include an Electronics laboratory intern at Escola Universitària d'Enginyeria Tècnica Industrial de Barcelona and a Summer Student at CERN involved in RF engineering. Núria holds a PhD in Electrical, Electronics and Communications Engineering from Universitat de Barcelona, a Master’s Degree in Electronics Engineering from UPC - ETSETB TelecomBCN, and a Degree in Telecommunication Engineering from the same institution.