Jayanti Karthik

Physical Design Engineer at SignOff Semiconductors

Jayanti Karthik is a Physical Design Engineer at SignOff Semiconductors since August 2022, previously serving as a System Engineer at Infosys from March 2021 to August 2022. Jayanti holds a Bachelor of Technology in Electronics and Communications Engineering from Geethanjali College of Engineering and Technology, completed in September 2020.

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